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AN603 vishay siliconix document number: 70574 08-jun-00 www.vishay.com faxback 408-970-5600 1 designing with the si9978dw configurable h-bridge controller wharton mcdaniel currently, there are a number of fully integrated h-bridges on the market. both bipolar and mos technologies have been used to create these parts. however, all of them suffer from problems such as limited current handling capability, large package size, and difficulty of assembly. the si9978dw addresses these problems with an architecture that allows flexible current handling capability, small size, and ease of assembly. instead of trying to integrate the power devices with the controller on a single piece of silicon, the si9978dw approach is to separate the controller from the mosfets. the benefit is efficient manufacture of both the controller and the mosfets, the flexibility to select the optimum mosfet for the application, and the ability to use surface-mount parts for both the controller and mosfets which makes assembly easier. altogether this means a low cost h-bridge solution. the si9978dw is a monolithic controller designed to be used with little foot power mosfets to create an all-n-channel h-bridge or two separate half bridges. in addition to this functional flexibility, the dual function allows standardization of components and reduces inventory costs. the si9978dw features integral high-side drive circuitry and an internal voltage regulator, which a llows operation over a 20- to 40-v dc input voltage range. protection features include cross-conduction protection, current limiting, and undervoltage lockout. the fault outputs indicate when undervoltage or overcurrent shutdown has occurred. the si9978dw is packaged in a 24-pin wide body soic. the si9978 has two modes of operation, full h-bridge, and independent half-bridge. the mode of operation determines the function of the input pins and the fault outputs. with the mode pin at logic 1, which is the default condition, the si9978 functions as a full h-bridge. with the mode pin at logic 0, the si9978dw functions as two independent half-bridges. the definitions of the control inputs depend on the mode of operation. all control inputs are pulled up to v dd . the fault outputs are open drain. truth tables have been provided for each mode of operation. figure 1. the si9978 is made up of the control logic, the gate drive outputs, v dd regulator, and protection circuitry. dir/in a qs/in b mode brk fault /fault a cl /fault b v+ gt a + il a + pwm/en b en/en a v dd r a /c a v dd input logic v dd v dd v dd v dd v dd v dd cap a cap b + il b + r b /c b 24 1 3 5 4 6 7 2 8 9 11 12 21 13 14 high-side u.v. lockout bootstrap reg. charge pump s a 22 gt b 17 bootstrap reg. charge pump s b 18 cap a 23 cap b 19 gb a 20 gb b 16 v dd v dd 15 gnd one shot one shot low-side u.v. lockout low-voltage regulator
AN603 vishay siliconix www.vishay.com faxback 408-970-5600 2 document number: 70574 08-jun-00 full h-bridge operation when operating as a full h-bridge, the control inputs become dir, qs, pwm, brk, and en. when connecting the bridge for anti-phase operation, the dir input is driven by the control system pwm signal. when connected for sign-magnitude operation, the dir input controls direction, and the system pwm signal drives the pwm input. independent half-bridge operation in the independent half-bridge mode, the control inputs become the independent controls for each half-bridge, ina, ena, inb, enb. the brk input is not functional in this mode of operation. gate drive outputs each half-bridge output is driven by a pair of n-channel mosfets. these are controlled by a low- and a high-side gate driver. they have been designed to drive a 600-pf load with a 110-ns rise time and a 50-ns fall time. the low-side gate is driven directly from the commutation logic and is powered by v dd . this means that v dd must be decoupled with a 1- f capacitor; otherwise the turn-on surge current can cause v dd to drop to the level of an undervoltage condition. the high side is a floating circuit powered from a combination bootstrap/charge pump supply. the bootstrap capacitor is charged to v dd when ever the low-side mosfet is turned on. at all other times, the charge pump keeps the bootstrap capacitor charged, replacing the charge used in powering the high-side circuitry and in turning on the mosfet. the value of the bootstrap capacitor is a function of the mosfet being driven. the bootstrap voltage should not drop more than 1 v as the result of a mosfet turn-on. for a 60-v dual n-channel mosfet like the si4946ey, 30 nc (qg) is required for turn-on at a vgs of 10 v. using the equation c = qg/v gs , 30 nf is required to provide sufficient charge for turn-on. to meet the criterion of dropping only 1 v at turn-on, the capacitor needs to be 10 times as large, making the equation c boot = 10(qg/v gs ). this makes the minimum value of c boot equal to 0.039 f. table 3 gives minimum recommended values for several mosfets that might be used with the si9979. this minimum recommended value is one standard value above the minimum calculated value.
mode dir/ in a en/ en a qs/ in b pwm/ en b brk il a + il b + gt a gb a gt b gb b cl / fault b fault/ fault a condition 1 1 1 1 0 l x h l l 1 1 nl 1 1 1 0 0 l x l l 1 1 normal oti 1 0 1 1 0 l x l h l 1 1 operation 1 0 1 0 0 l x l l 1 1 1 x 1 x x 1 l x l h l h 1 1 brake 1 x 0 x x x l x l l l l 1 1 disable 1 x 1 x x 0 x l l l l over-current 1 x x x x x x x l l l l 1 0 undervoltage on v dd
mode dir/ in a en/ en a qs/ in b pwm/ en b brk il a + il b + gt a gb a gt b gb b cl / fault b fault/ fault a condition 0 1 1 x 0 x l l h l l l 1 1 nl 0 0 1 x 0 x l l l h l l 1 1 normal oti 0 x 0 1 1 x l l l l h l 1 1 operation 0 x 0 0 1 x l l l l l h 1 1 0 x 1 x x x x l l x x 1 over-current on a 0 x x x 1 x x x x l l 1 over-current on b 0 x x x x x x x l l l l 0 0 undervoltage on v dd
AN603 vishay siliconix document number: 70574 08-jun-00 www.vishay.com faxback 408-970-5600 3
part number r ds(on) qg @ v gs = 10 v (nc) minimum recommended c boot ( f) si4946 0.055 30 0.039 si9956 0.10 7 0.01
the protection circuitry provides current limit, cross- conduction protection, undervoltage lockout, and the fault output. current limit the current limit circuitry consists of two comparators, each driving a one-shot multivibrator (figure 2). in the full h-bridge mode, comparator a controls the entire h-bridge. in the half-bridge mode, the two comparators function independently with their respective half-bridge. each comparator has an internal 100-mv reference voltage on the inverting input and an external sensing resistor connected to the non-inverting input. these inputs should be connected directly to the sensing resistor. this will eliminate the effects of any noise in the ground traces. the motor current must generate 100 mv across a sensing resistor for the comparator to trip. this in turn triggers theone-shot, turning off the active mosfets for a period defined by the product of the appropriate r and c. if the current has dropped below the threshold by the time the off period has expired, the mosfets will be turned on again. if the overcurrent condition remains after the off period has expired, the mosfets will be held off until the current drops below the threshold. cycle-by-cycle current limiting is achieved when the current limit off period is in the 100- s range. if the current limit off period is reduced to the 10- s range, a constant current mode current limit is achieved. in this mode, the rms current (and therefore the torque) is maximized for the current limit setting. this result is particularly useful when a maximum acceleration rate is required at power on. figure 3 shows typical current waveforms for both durations of the off period. one shot c t r t 100 mv r sense to commutation logic current from 3-phase mosfet bridge figure 2. current limit circuitry 10 s 100 s figure 3. current waveforms
AN603 vishay siliconix www.vishay.com faxback 408-970-5600 4 document number: 70574 08-jun-00 cross conduction protection when driven as an anti-phase h-bridge or in the independent half-bridge mode, the high-side and low-side mosfets of each active phase are toggled. to prevent shoot-through, each half-bridge has break-before-make circuitry. this delays the mosfet turn-on for approximately 250 ns from the turn-off of the opposite mosfet. undervoltage lockout internal circuitry monitors the voltage level on v dd and the high-side supplies. this ensures that there is sufficient voltage to turn on the mosfets. should the voltage level on v dd drop below 0.75 x v dd , all gate drives will be turned off until the undervoltage condition is gone. each of the high-side supplies is monitored only when it is referenced to ground. if the high-side voltage is under v dd - 3.3 v, the high side will not be allowed to turn on. fault outputs the si9978dw has a pair of fault outputs whose exact function changes according to mode of operation. in the h-bridge mode, the fault output indicates either an undervoltage or a current limit condition. the cl output indicates when there is a current limit condition. in the half-bridge mode, these outputs become fault a and fault b , indicating either an undervoltage or a current limit condition for their respective half-bridge. these outputs are configured as open drain outputs. the open drain configuration permits connection to wide range of voltages and several fault outputs can be wire-or'd. a negative going transition indicates the undervoltage or current limit condition exists.
figure 4 shows a basic h-bridge circuit. this circuit is based on the si9978dw driving two dual mosfets in so packages (little foot). all that remains is the passive devices required for current limit timing, filtering of the floating high-side supplies, pull-ups for the fault outputs, and decoupling of the v+ power supply, the si9978dw, and the power mosfets. the power mosfets assuming that the h-bridge has to handle a 2-a load, a 130-m (@25 c) mosfet is needed to allow operation at elevated temperature. the si4946ey exceeds this requirement with on-resistance of 55 m at 25 c. with the junction at 150 c, the r ds(on) will rise to 0.11 . at a 2-a load, the 0.5-w dissipation is within the si4946ey's rating and leaves headroom for starting current. the current sense resistor the current limit level is determined by the motor starting requirements, such as acceleration time, the power capability of the power mosfets, and the ability of the system power supply to supply current to the motor. for this design, the current limit level will be set at 3 a peak. there is a simple way to set this level. select a sensing resistor which will give 100 mv when 3 a flows through it. using ohm's law, r s = 100 mv/i pk . thus a 33-m resistor is required. a 0.5-w resistor will handle the starting condition. at the load current of 2 a, power dissipation is less than 150 mw. current limit one-shot timing if the current limit off-time is kept short, acceleration can take place as quickly as possible while respecting the peak starting current of 3 a. the recommended setting is 10 s. since this off-time is defined by the product of r and c, r is set to 100 k , making c equal to 100 pf. since the si9978dw is connected as a full h-bridge, the comparator driven by il a + controls the current limit function for the entire h-bridge. r a and c a are the timing components and therefore assume the values of 100 k and 100 pf. il b + and r b /c b should be connected to ground to ensure that noise does not cause a malfunction. bootstrap capacitor selection the value of the bootstrap capacitor is determined by the gate charge required for the mosfet selected. the si4946ey requires 30 nc (qg) at a v gs of 10 v. using the equation c boot = 10 (qg/v gs ), the typical value is 0.039 f. decoupling decoupling is required for v+, v dd , and the power mosfets. a 0.1- f capacitor, c3, should be connected to the v+ pin. v dd requires a 1- f capacitor, c2. c2 provides the surge current required from v dd during low-side mosfet turn on in addition to stabilizing the v dd regulation circuit. finally, 1- f capacitors should be connected directly across each half-bridge from high-side drain to low-side source. this will minimize or eliminate the ringing seen on the mosfet gate signals and noise generated by high switching speeds. pc board layout figure 5 shows the board layout of the basic h-bridge circuit. the board is double sided fr4 and measures 2.05o by 1.38o. there are a couple of issues that need to be stressed when designing the pc board.
AN603 vishay siliconix document number: 70574 08-jun-00 www.vishay.com faxback 408-970-5600 5 r 3 r 4 24 v+ v dd 1 en 23 cap a en/en a 2 dir 22 s a dir/in a 3 pwm 21 gt a pwm/en b 4 qs 20 gb a qs/in b 5 19 cap b mode 6 18 s b brk 7 brk 17 gt b cl /f b 8 cl 16 gb b f /f a 9 fault 15 gnd nc 10 14 il b + r a /c a 11 13 il a + r b /c b 12 u1 si9978dw c 2 c 3 r 2 100 k c 8 v+ c 1 c 4 c 5 q 1 c 6 q 2 q 3 c 7 q 4 a out b out gnd r 1 little foot v cc figure 4. basic h-bridge circuits decoupling capacitors - care must be taken in the placement and connection of the decoupling capacitors. the capacitor should be placed physically close to the device being decoupled. the connections should be direct and as short as possible. when decoupling a pin on an integrated circuit, connect the capacitor directly from the pin being decoupled to the ground pin of the ic. when decoupling a mosfet half-bridge, connect the capacitor directly from the drain of the high-side mosfet to the source of the low-side mosfet. power and ground traces - the traces carrying the motor current should be kept separate from the power traces of devices carrying signal level currents. this will minimize noise due to the high level currents drawn by a motor load. do not use power or ground plane for this purpose. also, make certain that these traces are made wide enough to minimize the voltage drop created by the motor current. heat transfer and little foot - surface mount power mosfets rely on the pc board to serve as a heat sink. wide traces should be connected to the drain pins of the power mosfets to draw heat away from their packages and transfer the heat into the pc board. these traces should be at least 0.1o wide. figure 5. component placement top copper bottom copper
AN603 vishay siliconix www.vishay.com faxback 408-970-5600 6 document number: 70574 08-jun-00 by separating the controller and the power mosfets, the si9978dw yields a good balance between circuit integration, compact h-bridge size and flexibility in application. the controller functions are highly integrated, leaving only a few external passive components. the integration makes it easy to use n-channel little foot which are electrically, volumetrically, and economically efficient. also, since they are separate from the controller, the mosfets can be matched to the load. the si9978dw, combined with little foot, gives compact, flexible h-bridge drive circuits for dc motor control.

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